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Novel systolic array realisation of allpass digital filters for high speed applications

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1 Author(s)
Kwan, H.K. ; Dept. of Electr. Eng., Windsor Univ., Ont., Canada

A novel systolic array realisation of a general allpass digital filter of any arbitrary order suitable for high speed delayed N-path recursive digital filtering applications is presented. The proposed systolic array is a purely systolic (not semisystolic) design which is also canonic in the number of multipliers, modulator in having one type of basic cell, and has nearest neighbour interconnections.

Published in:

Electronics Letters  (Volume:28 ,  Issue: 15 )