By Topic

How to mix bipolar and MOS technologies in high speed programmable frequency divider design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Choy, C.S. ; Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong ; Ho, C.Y. ; Lunn, G. ; Lin, B.
more authors

Based on a 165-MHz BiMOS programmable frequency divider, a way to mix bipolar and MOS technologies in high-speed divider design is discussed. It is suggested that the MOS section has to be further divided because of heavy loading on the MOS PRELOAD signal, rendering slow recovery from the preload state. Special circuit configurations are described in detail. The programmable divider has been implemented using the Motorola 2-μm BiMOS process. Comparing the area occupied by the bipolar section with that of the MOS section, one sees an enormous area reduction achieved by the BiMOS approach

Published in:

Circuits and Systems, 1991., Proceedings of the 34th Midwest Symposium on

Date of Conference:

14-17 May 1991