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Cost-effective LFSR synthesis for optimal pseudoexhaustive BIST test sets

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2 Author(s)
D. Kagaris ; Comput. Sci. Program, Dartmouth Coll., Hanover, NH, USA ; S. Tragoudas

The generation of pseudoexhaustive test sets for the built-in self-test (BIST) of combinational circuits is addressed, using as a test pattern generator a simple linear feedback register (LFSR), structure, known as LFSR/SR. It is shown that particular orderings of the LFSR cells can significantly reduce the test set size. In addition, it is shown that an LFSR/SK designed with a particular cell ordering and the allowance of a marginal number of additional cells guarantees pseudoexhaustive test sets of the minimum size 2/sup w/, where w is the maximum input dependency limit of the circuit under test. Extensive experimentation on benchmark circuits and comparisons with the hardware overhead of other methods indicate the advantage of this approach.<>

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:1 ,  Issue: 4 )