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ROM-based finite state machines with PLA address modifiers

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3 Author(s)
Luba, T. ; Inst. of Telecommun., Warsaw Univ. of Technol., Poland ; Gorski, K. ; Wronski, L.B.

An effective method for the synthesis of address modifiers in sequential circuits is described. The method, based on serial decomposition, substantially reduces the address modifier circuit complexity for a given microprogram memory size. It can be used effectively for PMS based designs and for full custom designs. The method was implemented in C++ on a PC. It was tested on standard finite state machine (FSM) benchmarks. Results indicate that for a wide range of cases the method gives a substantial (more than 50%) reduction of required ROM capacity, which may result in a saving of the silicon area in the actual full custom implementation

Published in:

Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European

Date of Conference:

7-10 Sep 1992