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Generating pipelined datapaths using reduction techniques to shorten critical paths

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2 Author(s)
Lobo, D.A. ; Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA ; Pangrle, B.M.

A new approach to pipelined scheduling is demonstrated. Using a greedy algorithm to generate the initial solution and then applying a series of transformations to the graph is shown to be effective in obtaining optimal and near optimal results without resorting to an exhaustive search. The algorithm handles multicycle pipelined functional units leading to the generation of compact schedules. Using pipelined functional units, the effective throughput is increased and shorter latency times are produced. Thus, in the case of the optimized finite impulse response (FIR) filter, a throughput of three clock cycles, with a latency of nine clock cycles can be obtained using a functional unit specification of five one-cycle adders and three two-cycle pipelined multipliers. In this case the throughput is doubled, and the latency is improved by 33% using pipelined units over non-pipelined units

Published in:

Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European

Date of Conference:

7-10 Sep 1992