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SEESIM-a fast synchronous sequential circuit fault simulator with single event equivalence

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3 Author(s)
Ching Pin Wu ; Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan ; Chung Len Lee ; Wen Zen Shen

The authors present a sequential circuit fault simulator of `single event equivalent', which combines the advantages of several techniques: fanout-free region, critical path tracing, and the dominator, techniques which were previously only applicable to combinational fault simulation. The simulator requires the minimal amount of memory, and its speed is superior to that of a state-of-the-art concurrent fault simulator and comparable with parallel type fault simulators

Published in:

Design Automation Conference, 1992., EURO-VHDL '92, EURO-DAC '92. European

Date of Conference:

7-10 Sep 1992