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A single-bit-line cross-point cell activation (SCPA) architecture for ultra-low-power SRAM's

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6 Author(s)
Ukita, M. ; ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan ; Murakami, S. ; Yamagata, T. ; Kuriyama, H.
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This paper describes a single-bit-line cross-point cell activation (SCPA) architecture, which has been developed to reduce active power consumption and to avoid increase in the size of high-density SRAM chips, such as 16-Mb SRAM's and beyond. A new PMOS precharging boost circuit, introduced to realize the single-bit-line structure, is also discussed. This circuit is suitable for operation under low-voltage power supply conditions. The SCPA architecture with the new word-line boost circuit is demonstrated with the experimental device, which is fabricated by a 0.4-μm CMOS wafer process technology

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:28 ,  Issue: 11 )