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An analog/digital BCDMOS technology with dielectric isolation-devices and processes

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7 Author(s)
Lu, C.-Y. ; AT&T Bell Labs., Reading, PA, USA ; Tsai, N.-S. ; Dunn, C.N. ; Riffe, P.C.
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A dielectrically isolated bipolar-CMOS-DMOS (BCDMOS) integrated-circuit technology that has been successfully developed for high-voltage applications (150-500 V) is reported. This technology integrates bipolar, CMOS, DMOS, p-n-p-n, JFET, and DGDMOS (dual-gate DMOS) devices on a single chip. The core BCDMOS process is chosen to be an optimized poly-gate n-channel DMOS process; additional levels and their relative sequences were chosen on the basis of their effects on the performance of the various kinds of devices in the chip and the trade-offs among those performances. The characteristics of the major devices in solid-state switches for telecommunication applications are demonstrated

Published in:

Electron Devices, IEEE Transactions on  (Volume:35 ,  Issue: 2 )

Date of Publication:

Feb 1988

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