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A gracefully degradable VLSI system for linear programming

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2 Author(s)
Bertossi, A.A. ; Dept. of Comput. Sci., Pisa Univ., Italy ; Bonuccelli, M.A.

The use of a fault-tolerant VLSI system for storing and solving linear programming problems is presented. The system can bear multiple faults in processing elements and/or links and still function with an acceptable performance degradation. It is based on an interconnection pattern consisting of a complete binary tree in which spare links between cousin nodes are added so as to reconfigure it as a ternary tree. At any given time of a computation, faulty processing elements and/or links are circumvented by using such spare links. It is shown that the total silicon area required by this structure is only a constant factor higher than that of a complete binary tree. The result is used to give an efficient implementation of the simplex algorithm in which the time required to perform a single pivot step matches a previously established lower bound for tree machines in spite of faults

Published in:

Computers, IEEE Transactions on  (Volume:38 ,  Issue: 6 )

Date of Publication:

Jun 1989

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