Referenced Items are not available for this document.
Using National Semiconductor's ABiC IV technology, a 0.8 μm single poly advanced BiCMOS process, a high performance mixed BiCMOS-ECL array with 5 ns access time embedded SRAM is achieved. The array integrates 105000 ECL gates, 18690 BiCMOS gates, and 40 kbits of BiCMOS SRAM on the same chip. I/O interface can be ECL, TTL, CMOS or mixed
Published in:
ASIC Conference and Exhibit, 1991. Proceedings., Fourth Annual IEEE International
Date of Conference: 23-27 Sep 1991
- Page(s):
- P9 - 7/1-4
- Meeting Date :
- 23 Sep 1991-27 Sep 1991
- Print ISBN:
- 0-7803-0101-3
- INSPEC Accession Number:
- 4387314
- Conference Location :
- Rochester, NY
- Digital Object Identifier :
- 10.1109/ASIC.1991.242922
- Product Type:
- Conference Publications
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