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CPC (cyclic pipeline computer)-an architecture suited for Josephson and pipelined-memory machines

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3 Author(s)
K. Shimizu ; Dept. of Inf. Sci., Tokyo Univ., Japan ; E. Goto ; S. Ichikawa

Describes a novel computer architecture, called a cyclic pipeline computer (CPC), which is especially suited for Josephson technologies. Since each Josephson logic device acts as a latch, it is possible to use high-pitch and shallow logic pipelining without any increase in delay time and cost. Hence, both the processor and the main memory can be built from the Josephson devices and can be pipelined with the same pipeline pitch time. The CPC supports multiple instruction/multiple data stream (MIMD) by time-sharing the processor and the main memory among multiple instruction streams. In addition, it employs advanced control to speed up the computation for each instruction stream

Published in:

IEEE Transactions on Computers  (Volume:38 ,  Issue: 6 )