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Design of a high-performance, low-noise charge preamplifier

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2 Author(s)
Wurtz, L.T. ; Dept. of Electr. Eng., Alabama Univ., Tuscaloosa, AL, USA ; Wheless, W.P.

A high-performance, low-noise charge preamplifier integrated circuit is designed and tested for the Superconducting Super Collider. The amplifier is fabricated in a new dielectrically isolated (DI), radiation-hardened, very-high-frequency (VHF) BIFET IC process technology from Harris Corporation. This new process provides n-p-n, p-n-p, and p-channel JFET devices which are both radiation-hardened, tested to 3 Mrad of total gamma ray exposure and 3×1014/cm2 neutron dosage, and provides high-frequency performance. The new charge preamplifier provides improved performance with an output rise time of 65 ns, input inferred noise of 28.6 μV, or 3575 electrons, and power dissipation less than 33.7 mW. The circuit design is discussed with attention given to those design characteristics needed to specifically accommodate low noise with the new radiation-hardened process

Published in:

Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on  (Volume:40 ,  Issue: 8 )

Date of Publication:

Aug 1993

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