Referenced Items are not available for this document.
A new parallel-concurrent fault simulation algorithm based on the partitioning of faults into groups, with the group size equal to the number of bits in the host computer word, is presented. The fault effects of a particular group are evaluated using parallel fault simulation techniques and propagated using concurrent fault simulation techniques. The speed of the algorithm depends on the circuit and on the fault-grouping criterion. An automatic grouping criterion is devised to group faults that are "close" or nearly equivalent. Comparisons to the concurrent, to the deductive, and to the PROOFS fault simulation techniques are performed on a SPARC SLC with 16 MB of memory running UNIX. ISCAS89 benchmark circuits are used for this comparison.<
Published in:
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
(Volume:1
,
Issue:
3
)
Date of Publication: Sept. 1993
- Page(s):
- 356 - 364
- ISSN :
- 1063-8210
- INSPEC Accession Number:
- 4647466
- Digital Object Identifier :
- 10.1109/92.238447
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Sept. 1993
- Sponsored by :
- IEEE Circuits and Systems Society
About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies
A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.
