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Impact of cache interferences on usual numerical dense loop nests

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3 Author(s)
O. Temam ; IRISA/INRIA, Campus Univ. de Beaulieu, Rennes, France ; C. Fricker ; W. Jalby

In numerical codes, the regular interleaved accesses that occur within do-loop nests induce cache interference phenomena that can severely degrade program performance. The authors identify cache interference phenomena and determine their causes and the conditions under which they occur. Based on these results, a methodology is derived for computing an analytical expression of cache misses for most classic loop nests, which can be used for precise performance analysis and prediction. It is shown that cache performance is unstable, because some unexpected parameters, such as arrays base address, can play a significant role in interference phenomena. It is also shown that the impact of cache interferences can be so high that the benefits of current data locality optimization techniques can be partially, if not totally, eradicated

Published in:

Proceedings of the IEEE  (Volume:81 ,  Issue: 8 )