A novel full-function EEPROM cell structure is described. The cell uses two polysilicon layers, a unique sublithographic poly-poly corner contact, and compact isolation to achieve good endurance, cell current, and capacitive coupling ratios in a scaleable and relatively self-aligned technology. Both program and erase operations are done using Fowler-Nordheim tunneling between the first and second poly layers. A single 5-V supply is required for operation. The cell size is 23 mu m/sup 2/ using 0.9- mu m minimum design rules. Full array functionality has been demonstrated on a 1 Mb EEPROM. In addition, a 15- mu m/sup 2/ version of the cell, suitable for a 4 Mb EEPROM, was fabricated using 0.7- mu m minimum design rules and was shown to be functional. Test structures show endurance of better than 1 million cycles.<
Published in:
Electron Devices Meeting, 1991. IEDM '91. Technical Digest., International
Date of Conference: 8-11 Dec. 1991