Referenced Items are not available for this document.
A novel method for computation of the CORDIC (coordinate rotation digital computer) algorithm is presented that is especially well suited for high throughput real-time signal processing applications. A transformation of the original CORDIC algorithm is derived which results in a partially fixed iteration sequence no longer dependent on intermediate signals. The transformed CORDIC iteration is efficiently realized using redundant number systems. The resulting carry-save architecture employing absolute value computation is described. A CORDIC processor for vector rotations (rotation mode) using the transformed CORDIC iteration with a clock frequency of 100 MHz is presented. Due to the extremely high throughput, it is especially well suited for real-time signal processing applications. To the authors' knowledge this circuit is currently fastest realization of the CORDIC algorithm
Published in:
Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on
(Volume:3
)
Date of Conference: 10-13 May 1992
- Page(s):
- 1089 - 1092 vol.3
- Meeting Date :
- 10 May 1992-13 May 1992
- Print ISBN:
- 0-7803-0593-0
- INSPEC Accession Number:
- 4411753
- Conference Location :
- San Diego, CA
- Digital Object Identifier :
- 10.1109/ISCAS.1992.230290
- Product Type:
- Conference Publications
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