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A silicon compiler for high-speed CMOS multirate FIR digital filters

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3 Author(s)
R. Hawley ; Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA ; T. Lin ; H. Samueli

A silicon compiler for high-speed multirate FIR (finite impulse response) digital filters is presented, with application to the design of a Hilbert transformer and sampling rate converter given as an example. The compiler automates the process of designing multirate spectral shaping filters and sampling rate converters without incurring area penalties with respect to hand-crafted designs. The compiler is designed for maximum flexibility, exploiting architectural symmetries such as those found in linear-phase filters, where possible, without limiting the scope of systems which may be designed. The resulting filters utilize canonic signed digit (CSD) multipliers, a transposed direct form structure, and carry-save addition for high speed. The GDTs (Generator Development Tools) from Mentor Graphics are used as the basis of the compiler. This system provides a technology-independent layout language in which various circuit concerns such as device sizing may be optimized for any given technology based on that technology's electrical characteristics

Published in:

Circuits and Systems, 1992. ISCAS '92. Proceedings., 1992 IEEE International Symposium on  (Volume:3 )

Date of Conference:

10-13 May 1992