ASIC design using VLSI technology CAD tools: an optimal edge detector circuit

Presents the design of an integrated circuit, with a pipeline architecture, supporting programmable recursive filters intended for optimal edge detection of 2D images. The circuit is designed and simulated in 1.5 mu CMOS technology using microelectronics computer aided design: COMPASS. This CAD contains all necessary tools (datapath library, timing verification, chip compiler. . .) for a successful design. This circuit can process up to 1024*1024 8-bit images at a 20 MHz pixel frequency.<
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