The authors present several basic techniques to design low-power and high-speed ASIC's. They are based on the need to design as simple circuits as possible. The same techniques are therefore capable of providing high-speed chips and low-power chips for portable electronics or DSP applications. The topics covered include: architectures of RISC, parallel and multitask type; layout techniques; schematic optimisation; and branch-based layout
Published in:
Euro ASIC '92, Proceedings.
Date of Conference: 1-5 Jun 1992