By Topic

An architecture for a video rate two-dimensional fast Fourier transform processor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Taylor, G.F. ; Bipolar Integrated Technol., Beaverton, OR, USA ; Steinvorth, R.H. ; McDonald, J.F.

A description of an architecture capable of computing two-dimensional fast Fourier transforms on a 256×256 pixel image at a rate of 30 images per second is presented. The architecture consists of a small number of basic building blocks which may be repeated to yield any desired performance. To achieve video rate performance, 16 butterfly processors, arranged as four coupled clusters of four processors each, and nine working memories are required. Because of the parallelism and pipelining used in the design, the system clock needed to achieve this high level of performance is only 240 ns

Published in:

Computers, IEEE Transactions on  (Volume:37 ,  Issue: 9 )