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Theory of clocking for maximum execution overlap of high-speed digital systems

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2 Author(s)
N. Park ; Dept. of Electr. Eng., California Univ., Irvine, CA, USA ; A. C. Parker

The effect of clocking schemes on overlapped execution performance in a digital system is described and quantified. Effects of branching, data dependencies, and resource conflicts between consecutive tasks are considered. Some problems of clocking scheme synthesis for the design of digital systems with maximum execution overlap are examined. Effects of performance of the choice of clocking scheme, partitioning of functions into the time steps, the number of clock phases, the length of each phase (i.e., how to pipeline), and the assignment of functions to clock phases are treated

Published in:

IEEE Transactions on Computers  (Volume:37 ,  Issue: 6 )