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FFT butterfly network design for easy testing

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2 Author(s)
Cheng-Wen Wu ; Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Chang, C.-T.

The authors consider offline testing and easily testable design of butterfly networks for fast Fourier transform. The butterfly networks are shown to be testable with 32 patterns using a design-for-testability technique based on the M-testability conditions. The functional-level cell-fault model is assumed, and the fault coverage for combinational single cell faults is 100%. A higher-level fault model-the module-fault model-is also discussed. A novel input-assignment technique based on the functional bijectivity property of the butterfly modules is presented for discovering faults other than cell faults (e.g., interconnection faults)

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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:40 ,  Issue: 2 )