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Optimizing a superscalar machine to run vector code

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1 Author(s)
Weiss, Shlomo ; Dept. of Electr. Eng. & Syst., Tel Aviv Univ., Israel

A streamlined vector architecture and the IBM superscalar RISC System/6000 are discussed. It is shown, step-by-step, how each handles the same program. The factors that let vector machines outperform the RS/6000 are identified. Several extensions to the RS/6000 architecture that could help it attain vector-level performance on code with long vectors are proposed.<>

Published in:

Parallel & Distributed Technology: Systems & Applications, IEEE  (Volume:1 ,  Issue: 2 )