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An input-free VT extractor circuit using a two-transistor differential amplifier

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1 Author(s)
M. G. Johnson ; Rambus Inc., Mountain View, CA, USA

A three-terminal circuit (power, ground, and output) that provides a DC output voltage equal to the MOS threshold voltage VT is presented. The circuit uses the four-terminal extractor topology of Z. Wang (1992), but it adds self-biasing and a two-transistor differential amplifier to provide a ground-referenced output voltage

Published in:

IEEE Journal of Solid-State Circuits  (Volume:28 ,  Issue: 6 )