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A 16-b 320-kHz CMOS A/D converter using two-stage third-order ΣΔ noise shaping

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3 Author(s)
Yin, G. ; Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium ; Stubbe, F. ; Sansen, Willy

The design and measured performance of a two-stage third-order ΣΔ (sigma-delta) analog-to-digital (A/D) converter is described. The A/D converter achieves a 96-dB dynamic range and a maximum signal-to-noise-plus-distortion ratio (S/(N+ D)) r.m.s./r.m.s. of 93 dB with 320-kHz output rate and an oversampling ratio of 64. An analysis of the integrator gain error is presented. The modulator is realized in a 1.2-μm double-metal single-poly CMOS process with an active area of 1.6 mm2. This modulator operates from a 5-V power supply and a single reference voltage

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:28 ,  Issue: 6 )

Date of Publication:

Jun 1993

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