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Characterization of oxide trap and interface trap creation during hot-carrier stressing of n-MOS transistors using the floating-gate technique

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4 Author(s)
B. S. Doyle ; Digital Equipment Corp., Hudson, MA, USA ; J. Faricelli ; K. R. Mistry ; D. Vuillaume

A technique has been developed to differentiate between interface states and oxide trapped charges in conventional n-channel MOS transistors. The gate current is measured before and after stress damage using the floating-gate technique. It is shown that the change in the I/sub g/-V/sub g/ characteristics following the creation and filling of oxide traps by low gate voltage stress shows distinct differences when compared to that which occurs for interface trap creation at mid gate voltage stress conditions, permitting the identification of hot-carrier damage through the I/sub g/-V/sub g/ characteristics. The difference is explained in terms of the changes in occupancy of the created interface traps as a function of gate voltage during the I/sub g/-V/sub g/ measurements.<>

Published in:

IEEE Electron Device Letters  (Volume:14 ,  Issue: 2 )