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Multibit correcting data interface for fault-tolerant systems

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3 Author(s)
Redinbo, G.R. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Davis, CA, USA ; Napolitano, L.M., Jr. ; Andaleon, D.D.

A fault-detecting, bidirectional data interface between uncoded data from one component, such as a processor, and coded data in the rest of the system is described. This interface is capable of correcting a single multibit symbol error or detecting the occurrence of two such errors. The device uses a shortened Reed-Solomon code, and two practical symbol sizes are considered; nibble (4-bit) errors are protected by a (40, 32) binary equivalent shortened code, and byte errors are covered by a (80, 64) binary-sized code. The Reed-Solomon codes have maximum protection levels, even when shortened, and allow simplifying the design options. A dual orthogonal basis used for the symbols' representations provides significant hardware savings. The interface unit achieves internal fault detection by comparing regenerated parity values in a totally self-checking equality checker. A fault-tolerant ultrareliable memory module is proposed and evaluated. An illustrative design is realized using a single desktop programmable gate array

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Computers, IEEE Transactions on  (Volume:42 ,  Issue: 4 )