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VLSI-oriented asynchronous controller synthesis based on a flip-flop cell array structure

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3 Author(s)
Cho, K.R. ; Dept. of Electron. Eng., Tokyo Univ., Japan ; Ikeda, M. ; Asada, K.

Presents a new implementation method of asynchronous controllers based on a cell array structure. Two kinds of cells are used to map asynchronous circuits synthesized by one-hot code assignment into layout; a basic cell with a flip-flop memory and set-reset logic, and an extension cell with set-reset logic. The present method gives considerable area reduction compared with a PLA-like implementation.<>

Published in:

Euro ASIC '91

Date of Conference:

27-31 May 1991