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Failure analysis of high-density CMOS SRAMs: using realistic defect modeling and I/sub DDQ/ testing

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3 Author(s)
Naik, S. ; Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA ; Agricola, F. ; Maly, W.

A rapid failure analysis method for high-density CMOS static RAMs (SRAMs) that uses realistic defect modeling and the results of functional and I/sub DDQ/ testing is presented. The key to the method is the development of a defect-to-signature vocabulary through inductive fault analysis. Results indicate that the method can efficiently debug the multimegabit-memory manufacturing process.<>

Published in:

Design & Test of Computers, IEEE  (Volume:10 ,  Issue: 2 )