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Highly reliable testing of ULSI memories with on-chip voltage-down converters

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7 Author(s)
Tsukude, M. ; Mitsubishi Electr. Corp., Hyogo, Japan ; Arimoto, K. ; Hidaka, H. ; Konishi, Y.
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Two testing techniques for ultra-large-scale integrated (ULSI) memories containing on-chip voltage downconverters (VDCs) are described. The first in an on-chip VDC tuning technique that adjusts internal V/sub CC/ to compensate for the monitored characteristics of the process parameters during repair analysis testing. The second is an operating-voltage margin test, performed at various internal V/sub CC/ levels during the water sort test (WT) and the final shipping test (FT).<>

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Design & Test of Computers, IEEE  (Volume:10 ,  Issue: 2 )