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On the optimal design of multiple-valued PLAs

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1 Author(s)
Sasao, T. ; Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Iizuka, Japan

A description is given of the design and analysis of three types of multivalued PLAs (programmable logic arrays). Type 1 PLAs realize functions directly in the form of the max of min of literal functions and constants. In Type 2 PLAs, the body of the PLA is binary and the output is encoded as a multiple-valued logic value. Type 3 PLAs are the same as type 2 PLAs except for the use of 2-bit decoders and a permutation network on the input. Using the number of columns required to realize a given function as a measure to compare PLAs, it is shown that type 3 PLAs are superior to type 2, which in turn are superior to type 1

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Computers, IEEE Transactions on  (Volume:38 ,  Issue: 4 )