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Formal verification of fault tolerance using theorem-proving techniques

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3 Author(s)
Kljaich, J., Jr. ; AT&T Bell Lab., Naperville, IL, USA ; Smith, B.T. ; Wojcik, A.S.

A formal verification system based on the use of automated reasoning techniques is described to validate fault tolerance. An extended Petri net representation, called a flow net, is described together with the theorem-proving implementation of a rule-based system for manipulating system descriptions. Examples taken from the literature are used to illustrate the representation and the capabilities of the formal verification system under development

Published in:

Computers, IEEE Transactions on  (Volume:38 ,  Issue: 3 )