By Topic

Examination of oxide damage during high-current stress of n-MOS transistors

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Doyle, B.S. ; Digital Equipment Corp., Hudson, MA, USA ; Krakauer, D.B. ; Mistry, K.R.

Damage to n-channel MOSFETs under different levels of drain current stress is compared. It is shown that the post-stress I d-Vgs characteristics show distinctly different behavior for different stresses. These differences are interpreted in terms of the location of the stress damage along the Si-SiO2 interface. It is shown that damage from low drain current stress occurs at the Si-SiO2 interface just inside the drain junction, under strong gate control. Damage from high drain current stress occurs at the Si-SiO2 interface deeper inside the drain junction region, under weak gate control. The damage localization interpretation is supported by simulations and by localized Fowler-Nordheim injection experiments. It is further shown that at intermediate levels of drain current injection, the damage occurs at the Si-SiO2 interface in both drain regions. The differences are explained in terms of the bipolar action at high drain current levels, which forces the channel charge away from the Si-SiO2 interface at the drain junction edge

Published in:

Electron Devices, IEEE Transactions on  (Volume:40 ,  Issue: 5 )