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A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture

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4 Author(s)
T. Kobayashi ; Toshiba Corp., Kawasaki, Japan ; K. Nogami ; T. Shirotori ; Y. Fujimoto

Two new power-saving schemes for high-performance VLSIs with a large-scale memory and many interface signals are described. One is a current-controlled latch sense amplifier that reduces the power dissipation by stopping sense current automatically. This sense amplifier reduces power without degrading access time compared with the conventional current-mirror sense amplifier. The other is a static power-saving input buffer (SPSIB) that reduces DC current in interface circuits receiving TTL high input level. The effectiveness of these new circuits is demonstrated with a 512-kb high-speed SRAM

Published in:

IEEE Journal of Solid-State Circuits  (Volume:28 ,  Issue: 4 )