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A low-power 12-b analog-to-digital converter with on-chip precision trimming

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3 Author(s)
De Wit, M. ; Texas Instruments Inc., Dallas, TX, USA ; Tan, K.-S. ; Hester, R.K.

The design and performance of a 12-b charge redistribution analog-to-digital converter (ADC) is described. The architecture is chosen to minimize power dissipation. Die area is minimized by a modified self-calibration algorithm and nonvolatile memory based on polysilicon fuses. The ADC is fabricated in a 1-μm CMOS process. It converts at a 200-kHz rate with a power dissipation of 10 mW

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:28 ,  Issue: 4 )