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A design-for-testability expert system for silicon compilers

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3 Author(s)
van Riessen, R.P. ; MESA Res. Inst., Twente Univ., Enschede, Netherlands ; Kerkhoff, H.G. ; Janssen, J.M.J.

This paper describes a design-for-testability expert system for the selection of the most appropriate test method for every macro within an IC. The interface with the system designer is user-friendly and together with an efficient search mechanism this expert system can be used as a framework for all types of macros. This tool will be used in a self-test compiler, which generates the layout of self-testable macros automatically. The self-test compiler can be part of a silicon compilation system and thus contribute to the integration of testability into the design process.<>

Published in:

VLSI Test Symposium, 1991. 'Chip-to-System Test Concerns for the 90's', Digest of Papers

Date of Conference:

15-17 April 1991