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Dual port static RAM testing

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1 Author(s)
Raposa, M.J. ; Sun Microsyst. Inc., Mountain View, CA, USA

The basics are presented of a test methodology used for dual-port static RAMs (random-access memories). The fundamental problem in testing dual-port static RAMs is how to address the entire array from both sides individually. Any memory tester with dual pattern generators and dual timing systems would suffice, but most existing memory testers were designed and built before dual-port static RAMs were introduced, and offer no such solution. The following three methods have been proposed, and the advantages and disadvantages of each one explored. They are: same address, both ports; complement address; and separation of ports

Published in:

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Date of Conference:

12-14 Sep 1988

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