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Packaging technologies for 500-MHz VLSI test system ULTIMATE

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5 Author(s)
Y. Sakagawa ; LSI Lab., NTT, Kanagawa, Japan ; Y. Akazawa ; N. Narumi ; A. Yoshii
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The prototype VLSI test system ULTIMATE has a 1024-pin capability at 500-MHz test rate and a timing accuracy of ±50 ps. A novel packaging method improves signal quality, heat removal, and cost. ULTIMATE's compact water cooled frame and thermal conduction elements enable 10001 W/L power consumption at a packing density of 270 chips/L

Published in:

Test Conference, 1988. Proceedings. New Frontiers in Testing, International

Date of Conference:

12-14 Sep 1988