By Topic

A multichip module design process for notebook computers

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Franzon, P.D. ; Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA ; Evans, R.J.

A packaging system design process for multichip modules (MCMs) is presented. The performance factors, cost factors, alternative packaging technologies, and packaging alternatives for daughter cards are discussed. The process is illustrated by applying to the design of a 80386SL chip that contains a 32-b integer central processing unit (CPU), memory management, bus control, and buffering, and a 82360SL companion chip that contains control functions for the system, I/O, peripherals, power management, and a majority of the glue logic required by the system.<>

Published in:

Computer  (Volume:26 ,  Issue: 4 )