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YOR: a yield optimizing routing algorithm by minimizing critical area and vias

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1 Author(s)
Sy-Yen Kuo ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

The goal of a channel routing algorithm is to route the nets with as few tracks as possible to minimize the chip area and achieve 100 percent connection. However, the manufacturing yield may not reach a satisfactory level if care is not taken to reduce the critical areas which are susceptible to defects. A new channel routing algorithm is presented to deal with this problem. The approach is to systematically eliminate critical areas by floating, burying, and bumping net segments as well as shifting vias. The yield optimizing routing (YOR) algorithm also minimizes the number of vias. The experimental results show that large reduction in the number of critical areas and significant improvement in yield are achieved

Published in:

Design Automation, 1992. Proceedings., [3rd] European Conference on

Date of Conference:

16-19 Mar 1992