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Defect level estimation of circuit testing using sequential statistical analysis

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1 Author(s)
Wen-Ben Jone ; Dept. of Comput. Sci., New Mexico Inst. of Min. & Technol., Socorro, NM, USA

Sequential statistical analysis is applied to determine the defect level of random and pseudorandom testing. Results derived using worst-case analysis show that the defect of pseudorandom testing is always no larger than the defect of random testing. It is found that the defect level of random testing is a good approximation of that of pseudorandom testing only if either the yield or circuit detectability is high. The random test length is estimated, using the defect level as a basis. It is shown that random test length determination based on defect level yields a more realistic result than that based on escape probability. Monte Carlo simulation is also conducted to evaluate the performance and feasibility of the proposed defect level analysis. The results obtained are based primarily on the worst-case analysis. However, the analysis also provides an exact solution if each fault occurs equally likely (a general assumption). In addition, the approach may lead to a general solution

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:12 ,  Issue: 2 )