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High-quality CMOS in thin (100 nm) silicon on sapphire

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3 Author(s)
Garcia, G.A. ; US Naval Ocean Syst. Center, San Diego, CA, USA ; Reedy, Ronald E. ; Burgener, M.L.

Electrical characteristics of enhancement-mode n-channel and p-channel MOSFETs in 100-nm-thick silicon-on-sapphire (SOS) are reported. Channel mobilities (linear operation) of 500 and 200 cm/sup 2//V-s, respectively, have been measured in double solid-phase epitaxially (DSPE) improved material. Deep trap levels associated with the Si-sapphire interface were measured in concentrations as low as 1*10/sup 11/ cm/sup -2/. These results indicate that DSPE-improved SOS films thinned to 100 nm are suitable for application to high-performance down-scaled CMOS circuitry.<>

Published in:

Electron Device Letters, IEEE  (Volume:9 ,  Issue: 1 )