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Post-layout verification of the WE DSP32 digital signal processor

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7 Author(s)
L. E. Bays ; AT&T Bell Lab., Holmdel, NJ, USA ; Chin-Fu Chen ; E. M. Fields ; R. N. Gadenz
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The authors describe the successful postlayout verification of the WE DSP32 digital signal processor and the application of advanced CAD (computer-aided design) tools. The development work culminated in the smooth transfer of the DSP32 design into high-volume production. During this period, the authors were able to diagnose and repair hundreds of design errors. They also caught errors in the test-vector software and fixed them before first silicon. They estimate that their verification work saved the DSP32 project a year of silicon debugging. In addition, the authors were able to enhance the CAD tools themselves.<>

Published in:

IEEE Design & Test of Computers  (Volume:6 ,  Issue: 1 )