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Use of VHDL synthesis in an advanced digital design course

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1 Author(s)
Reese, B. ; Dept. of Electr. Eng., Mississippi State Univ., MS, USA

A very-high-speed integrated-circuit hardware description language (VHDL) synthesis tool from Viewlogic is being used in an advanced digital design course. The tool has the capability of synthesizing sequential elements (flip-flops) as well as combinational logic. The tool gives students the capability of practicing a true top-down design methodology. Synthesis implementation targets used were the ITD standard cell library (Oct-tools), the Xilinx field programmable gate array (FPGA), the Actel FPGA, and the Altera FPGA. The addition of the Viewlogic VHDL simulation/synthesis tool and the FPGA mapping software has significantly enhanced the advanced digital design course. It allows students to evaluate tradeoffs between standard cell, Xilinx, Altera, and Actel implementations

Published in:

Southeastcon '92, Proceedings., IEEE

Date of Conference:

12-15 Apr 1992