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All digital phase-locked loop: concepts, design and applications

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2 Author(s)
Shayan, Y.R. ; Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada ; Le-Ngoc, T.

The concepts of an all digital phase-locked loop (DPLL), which contains a purely digital phase detector, loop filter and voltage-controlled oscillator, are explained. A second order DPLL is considered and analysed using the Z-transform technique. Implementation of the DPLL, based on the CMOS digital signal processor TMS 320C25, and the experimental results, are presented. Potential applications are also discussed.

Published in:

Radar and Signal Processing, IEE Proceedings F  (Volume:136 ,  Issue: 1 )