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A low-cost architecture for real-time processing and analysis of binary images

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2 Author(s)
Hugen, F.M. ; Control Syst. & Comput. Eng., Lab., Fac. of Electr. Eng., Twente Univ., Enschede, Netherlands ; Bulsink, B.

An architecture is presented for low-cost and flexible realisation of image processing and analysis algorithms of binary images. The flexibility of the architecture is due to reconfigurable network of simple boolean functions. It is shown that this architecture can readily be implemented by low-cost off-the-shelf components. This is illustrated by some simulations of a hypothetical realisation

Published in:

Pattern Recognition, 1992. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, Proceedings., 11th IAPR International Conference on

Date of Conference:

30 Aug-3 Sep 1992