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Throughput enhancement in multiprocessor architectures for pipelining and digital signal processing applications

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2 Author(s)
Som, S. ; ECE Dept., Old Dominion Univ., Norfolk, VA, USA ; Wagh, M.

The authors discuss throughput enhancement for pipelining and digital signal processing applications in a multiprocessor environment. A common objective in pipelining and digital signal processing is the repeated execution of the same computational job consisting of a set of computational operations with high throughput or sampling rates. For good performance and avoidance of internal conflicts, the concurrent computational operations of successive data sets of a computational job should be properly scheduled. Heuristic suboptimal scheduling algorithms are developed whose execution time is a polynomial function of the number of items to be scheduled. Insertion of delay is used as a basic tool for better utilization of hardware, thereby increasing the throughput. Rescheduled computational jobs are directed to architectures consisting of arbitrary number of processors. Simulation results are presented.<>

Published in:

Computers and Communications, 1992. Conference Proceedings., Eleventh Annual International Phoenix Conference on

Date of Conference:

1-3 April 1992

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