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Circuit design for a large area high-performance crossbar switch

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2 Author(s)
Patyra, M. ; Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA ; Maly, W.

The methodology for circuit design of large area ICs (LAICs) is discussed. The partitioning and layout strategies for a self-testing, self-reconfigurating LAIC are formulated. It is shown that by proper layout design the circuit sensitivity to the manufacturing defects can be drastically decreased. A LAIC crossbar switch chip, which served as a vehicle for the experimental verification of the described ideas, was designed, fabricated and successfully tested. The built-in current (BIC) sensor was used in the fabricated crossbar IC in order to perform self-testing and self-reconfiguration purposes

Published in:

Defect and Fault Tolerance on VLSI Systems, 1991. Proceedings., 1991 International Workshop on

Date of Conference:

18-20 Nov 1991