Referenced Items are not available for this document.
A real-time stereo digital audio decoder based on one 16-b digital signal processor (DSP) chip, implementing the decoder portion of an audio compression system, is described. The roundoff-sensitive portions of the decoder include pre multiplier and conventional inverse FFT operations, which have been efficiently coded with mixed-precision 16-b by 32-b multiplies with 32-b accumulations. Compared with a 16-b single-precision implementation, a moderate increase in DSP CPU utilization is incurred. Results indicate that the dynamic range of the 16-b DSP decoder is currently within 1 to 3 dB of the limitations imposed by high-quality 16-b A/D and D/A converters
Published in:
Consumer Electronics, IEEE Transactions on
(Volume:39
,
Issue:
1
)
Date of Publication: Feb 1993
- Page(s):
- 40 - 44
- ISSN :
- 0098-3063
- INSPEC Accession Number:
- 4401147
- Digital Object Identifier :
- 10.1109/30.199592
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Feb 1993
- Sponsored by :
- IEEE Consumer Electronics Society
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