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Multi-stage decimation filter design technique for high-resolution sigma-delta A/D converters

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1 Author(s)
Park, S. ; Motorola Inc., Austin, TX, USA

A design technique for a multistage halfband decimation filter structure to enhance the effective resolutions of sigma-delta (Σ-Δ) analog-to-digital (A/D) converters is discussed. In particular, a series of six halfband filters is implemented to obtain more than 18 bits of effective resolution from a digital signal with 12-bit effective resolution. Since this multistage structure is flexible to change the filter design specification, the number of stages in the decimation process can be adjusted to fit the needs for a specific application. By taking advantage of the oversampling methodology and third-order noise shaping by the Σ-D modulator, more than 120 dB of SNR can be achieved. The theoretical analysis and experimental results with a currently available Σ-Δ converter are also included

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Instrumentation and Measurement, IEEE Transactions on  (Volume:41 ,  Issue: 6 )